Yicheng Huang
Biography
I am an integrated circuit and hardware acceleration engineer. I received my M.S. in Integrated Circuit Science and Engineering from the School of Integrated Circuit Science and Engineering, Beihang University, under the supervision of Associate Professor Xueyan Wang. I received my B.S. from the School of Information Science and Technology, Southwest Jiaotong University, under the supervision of Associate Professor Zhixiong Di.
My work focuses on cryptographic hardware acceleration, modular arithmetic, FPGA/VLSI architecture, and hardware/software co-design. Recent projects include ECC accelerators for V2X security, NTT-friendly Montgomery modular multiplication, and FPGA/ASIC implementations for privacy-preserving computing.
I am currently working in industry.
Selected Publications
- KD-Finder, IEEE TCAD, 2025.
- LLP-ECCA, IEEE ITC-Asia, 2024. Best Paper Award.
- Efficient and Agile ECC Acceleration, IEEE ISCAS, 2026.
- Design of an efficient Montgomery modular multiplier based on FPGA, Integrated Circuits and Embedded Systems, 2025. Cover article.
- Efficient Design and Implementation of SM4 Algorithm with CBC Mode, Journal of Computer Research and Development, 2024.
For the full list, see Publications.