ECC accelerator and automated compilation

This project explores programmable ECC acceleration for V2X-style security workloads. The work combines ASIP-based hardware architecture, modular arithmetic optimization, and automated compilation from high-level mathematical expressions to executable accelerator instructions.

Related publications include LLP-ECCA at IEEE ITC-Asia 2024 and Efficient and Agile ECC Acceleration at IEEE ISCAS 2026.