Efficient and Agile ECC Acceleration: A Hardware/Software Co-Design with Automated Compilation
Published in IEEE International Symposium on Circuits and Systems (ISCAS), 2026
This work presents a hardware/software co-design flow with automated compilation for agile elliptic curve cryptography acceleration.
Recommended citation: Y. Huang and X. Wang, "Efficient and Agile ECC Acceleration: A Hardware/Software Co-Design with Automated Compilation," IEEE International Symposium on Circuits and Systems (ISCAS), 2026. Accepted as poster, Paper ID: 2491.
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