CV

Yicheng Huang (黄亦成)

huangyicheng@buaa.edu.cn
Beijing, , CN

Summary

Integrated circuit and hardware acceleration engineer focused on cryptographic accelerators, modular arithmetic, FPGA/VLSI architecture, and hardware/software co-design.

Education

  • Integrated Circuit Science and Engineering
    2026-01
    Beihang University
  • Microelectronics
    2023-06
    Southwest Jiaotong University

Work Experience

  • Integrated circuit / hardware acceleration engineer
    2026 -
    Industry

Skills

Programming

  • C
  • Verilog
  • Python

Digital IC and FPGA design

  • Design Compiler
  • VCS
  • Verdi
  • ModelSim
  • SpyGlass
  • Vivado
  • Vitis
  • Quartus

Hardware acceleration

  • ECC
  • NTT
  • Montgomery modular multiplication
  • FPGA
  • VLSI
  • hardware/software co-design

Publications

  • KD-Finder: A Karatsuba Decomposition Optimization Finder for NTT-Friendly Montgomery Modular Multiplication
    2025
    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD)
    DOI: 10.1109/TCAD.2025.3634196.
  • LLP-ECCA: A Low-Latency and Programmable Framework for Elliptic Curve Cryptography Accelerators
    2024
    IEEE International Test Conference in Asia (ITC-Asia)
    Best Paper Award.
  • Efficient and Agile ECC Acceleration: A Hardware/Software Co-Design with Automated Compilation
    2026
    IEEE International Symposium on Circuits and Systems (ISCAS)
    Accepted as poster by IEEE ISCAS 2026. Paper ID: 2491; session A3P-21.
  • PPGNN: Fast and Accurate Privacy-Preserving Graph Neural Network Inference via Parallel and Pipelined Arithmetic-and-Logic FHE Accelerator
    2024
    ACM/IEEE Design Automation Conference (DAC)
  • ESC-NTT: An Elastic, Seamless and Compact Architecture for Multi-Parameter NTT Acceleration
    2024
    Design, Automation & Test in Europe Conference & Exhibition (DATE)
  • 基于FPGA的高效蒙哥马利模乘器设计
    2025
    集成电路与嵌入式系统
    封面文章。
  • 国密SM4算法CBC模式的高效设计与实现
    2024
    计算机研究与发展

Presentations

  • DATE 2024 Presentation: ESC-NTT
    2024
    2024 Design, Automation & Test in Europe Conference & Exhibition (DATE)
    Valencia, Spain
    Presentation for ESC-NTT.
  • ITC-Asia 2024 Presentation: LLP-ECCA
    2024
    2024 IEEE International Test Conference in Asia (ITC-Asia)
    Changsha, China
    Presentation for LLP-ECCA, Best Paper Award.
  • ISCAS 2026 Poster: Efficient and Agile ECC Acceleration
    2026
    IEEE International Symposium on Circuits and Systems (ISCAS)
    Shanghai, China
    Poster presentation, Paper ID 2491, session A3P-21.

Portfolio

  • ECC accelerator and automated compilation
    Projects
    Hardware/software co-design for agile elliptic-curve cryptography acceleration.
  • NTT-friendly modular arithmetic accelerators
    Projects
    Montgomery modular multiplication, NTT-friendly arithmetic, and FPGA/VLSI accelerators.

Interests

  • Research and engineering interests
    Cryptographic accelerators, Privacy-preserving computing, Modular arithmetic, Embedded systems